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Valorado. / 5. Basado en revisión del cliente
350 Cable Survey System
DPN 402197 © TSS (International) Ltd Page 8 of 14
Figure 10–7: 401103-1 Processor Board
LPWR
LEAK
GND
GND
/SD1IN COMMS1
/LR1IN TxD1 COMMS2
/SK1IN RxD1 COMMS3
/FS1IN DTR1 COMMS4
/SD2IN
/LR2IN
/SK2IN
/FS2IN
/SD3IN /INT1
/LR3IN
/SK3IN /ADCEN
/FS3IN
GND ITXD2
G0 IRXD2
G1 FGND
DPD
APD G0 P24V
CMODE G1 TxD2 PCOM
GND DPD RxD2
TCLK0 APD TxD3
CMODE RxD3
GND TCLK0
+5V
+15V ITXD3
IRXD3
AGND FGND
-15V P24V
PCOM
GND
P24V
PCOM
+5V+5V
GND
+15V
AGND
-15V
GND
A[0..23]
D[0..31]
VCC +5VVDD
VSS VEEGND
Title
Size Document Number Rev
Date: Sheet of
401103G1 G
PROCESSOR BOARD
(C) TSS (UK) Ltd. 2001
ALL RIGHTS RESERVED
TSS 350 CABLE SURVEY SYSTEM
A3
14Tuesday, August 14, 2001
TO CN5
ONLY
TESTPOINT LOCATIONS
TP1 A
TP1 B
TP1 C
TP1 D
GND (DIGITAL)
RESET SWITCH
+5V
/RESET
TP2 A
TP2 B
TP2 C
TP2 D
TP2 E
TP2 F
TP2 G
TP2 H
TP2 I
TP2 J
TP2 K
TP2 L
TP2 M
TP2 N
TP2 O
TP2 P
TP3 A
TP3 B
TP3 C
TP3 D
TP3 E
TP3 F
TP3 G
TP3 H
TP3 I
TP3 J
TP3 K
TP3 L
TP3 M
TP3 N
TP3 O
TP3 P
GND
TIMER 1
TIMER 0
XF0 FLAG
XF1 FLAG
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(1)
(2)
(3)
(4)
H1 CPU STATUS
H3 CPU STATUS
32.768MHz CLK
/STRB STROBE
/RDY READY
RWL (WRITE=0)
RAMCE ACTV HI
/BOOTCE EPROM
/E2CE E2PROM
/IOEN TO U13
/INT0
GND
/ZWR SLOW WR
/ZRD SLOW RD
/CSSCC2 SCC2
/CSSCC1 SCC1
/ADCEN
/ZRDY WAITS
TxD1 SER OUT
TxD2 SER OUT
TxD3 SER OUT
RxD1 SER IN
RxD2 SER IN
RxD3 SER IN
RxD4 NOT USED
TxD4 NOT USED
SCC CLOCK
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TP4 A
TP4 B
TP4 C
TP4 D
TP4 E
TP4 F
TP4 G
TP4 H
TP4 I
TP4 J
TP4 K
TP4 L
TP4 M
TP4 N
TP4 O
TP4 P
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
TP5 A
TP5 B
TP5 C
TP5 D
TP5 E
TP5 F
(1)
(2)
(3)
(4)
(5)
(6)
TP6 A
TP6 B
TP6 C
TP6 D
TP6 E
TP6 F
TP6 G
(1)
(2)
(3)
(4)
(5)
(6)
(7)
REF PIN SHT FUNCTION REF PIN SHT FUNCTION
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
GND
SK1 SHFT CLK
FS1 FRM SYNC
SD1 SER DATA
LR1 CHANNEL
LCLK1SRLTCH
SK2 SHFT CLK
FS2 FRM SYNC
SD2 SER DATA
LR2 CHANNEL
LCLK2 SR LTCH
SK3 SHFT CLK
FS3 FRM SYNC
SD3 SER DATA
LR3 CHANNEL
LCLK3 SR LTCH
4
4
4
4
4
4
GND
/IACK CLR F/F
/RD3 RD CHN 3
/RD3 RD CHN 2
/RD3 RD CHN 1
/INT1 TO CPU
2
2
2
2
2
2
2
GND
/GPOEN LATCH
G0 TO PREAMP
G1 TO PREAMP
DPD ADC CTRL
APD ADC CTRL
CMODE ADC CTRL
DIGITAL GROUND
DIGITAL GROUNDTP8 - TP11
TP7 A
TP7 B
TP7 C
TP7 D
(1)
(2)
(3)
(4)
3
3
3
3
UART CLOCK CH 1
UART CLOCK CH 2
UART CLOCK CH 3
TP12 3 ISOL. GND - MAIN IO
TP13 3 ISOL. GND - AUX IO
LEEK
DETECTOR
CHK
21FEB95
2
BB
B
6
DB
D
REVISION HISTORY
BY
17APR00
2
1423
4
614
C
ISS
MI
* Note issue 3 not used due
to part number errors
14 AUG 01
TWT2
** Issue 5 Not Used (Addition of Assy
revision box & PLCC sockets removed).
GB
SW
5**
DB
G
CCT DATE
24SEP99
----
E
RPM
ECR
4
08SEP95
1566
A
F
1676
ED
1579
REV
16 OCT 00
NOs
20APR00
2
1240
3*
PCB
BY
Assemble PCBs - 401103
Bare PCB - 301077
DB
PL3
MOLEX
5414-6
1
2
3
4
5
6
D4
LED
TP9
PL5
T&B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
PL1
MOLEX
5414-8
1
2
3
4
5
6
7
8
PROCESSOR CORE
401103G2
A[0..23]
D[0..31]
/INT1
/ADCEN
G0
G1
DPD
APD
CMODE
TCLK0
TxD1
DTR1
RxD1
TxD2
RxD2
TxD3
RxD3
comms
401103G3
TxD1
RxD1
DTR1
TxD2
RxD2
TxD3
RxD3
COMMS1
COMMS2
COMMS3
COMMS4
ITxD2
IRxD2
FGND
ITxD3
IRxD3
ADC INTERFACE
401103G4
/FS3IN
/SK3IN
/LR3IN
/SD3IN
/FS2IN
/SK2IN
/LR2IN
/SD2IN
/FS1IN
/SK1IN
/LR1IN
/SD1IN
/ADCEN
/INT1
D[0..31]
A[0..23]
LPWR
LEAK
PL10
MOLEX
5414-3
1
2
3
TP10TP8
PL4
MOLEX
5414-6
1
2
3
4
5
6
PL2
MOLEX
5414-4
1
2
3
4
TP11
R1
470R
- Cable Survey System 1
- System Manual 1
- GLOSSARY 13
- AMENDMENTS 14
- 1 INTRODUCTION 16
- 1.1 SYSTEM DESCRIPTION 20
- 1.2 PRINCIPLE OF OPERATION 21
- 1.3 QUICK START FOR SDC USERS 22
- 1.4 WARRANTY 22
- 2 SYSTEM OVERVIEW 24
- 2.1 SCOPE OF DELIVERY 25
- 2.2 UNPACKING AND INSPECTION 27
- 2.3 SURFACE COMPONENTS 28
- Figure 2–3: SDC Display 29
- Figure 2–4: SDC PC Console 29
- 2.4 SUB-SEA COMPONENTS 32
- 2.4.1 Sub-sea Electronics Pod 32
- ❐ Power/comms 33
- ❐ Altimeter 33
- ❐ Aux Output 33
- ❐ Sensor 33
- 2.4.2 Sensing Coils 34
- 2.4.3 Altimeter 36
- ❐ Tracked ROVs or crawlers 37
- ❐ Trenching ploughs 37
- ❐ Towed sleds 37
- 3 PHYSICAL INSTALLATION 38
- 3.1 SDC INSTALLATION 39
- 3.2 SUB-SEA INSTALLATION 40
- 3.2.1 SEP 40
- 3.2.2 Sensing Coils 42
- 3.2.2.1 Assembling the Coils 43
- 3.2.2.2 Mounting the Coils 46
- 3.2.3 Altimeter Installation 48
- 3.3 INSTALLATION CHECK LIST 50
- 4 ELECTRICAL INSTALLATION 52
- 4.1 SUB-SEA COMPONENTS 53
- 4.1.1 Ground Connections 54
- 4.1.3 Sub-sea Electronics Pod 55
- 4.1.3.1 Power Requirement 56
- 4.1.4 Sensing Coils 58
- 4.1.5 Sub-sea Altimeter 59
- 4.1.5.2 Connection to the SDC 60
- 4.1.6 Roll/Pitch Sensor 61
- 4.2 SURFACE DISPLAY COMPUTER 62
- 4.2.1 Power Connection 62
- 4.2.4 Interface to Video 68
- 5 SYSTEM CONFIGURATION 70
- 5.1 SOFTWARE INSTALLATION 71
- 5.2 POWER-ON PROCEDURE 72
- 5.3.1 SEP type 74
- 5.3.2 Communication ports 75
- 5.4 PRINT CONFIGURATION 77
- 5 – System Configuration 78
- 6 OPERATION SOFTWARE 80
- ONFIGURATION 81
- 6 – Operation software 84
- 6.2.1.2 Run/ Display screen 87
- the centre line. Measure 89
- ❐ Communication status 90
- ❐ System time 90
- ❐ System errors 90
- 6.2.1.3 Forward Search Screen 91
- 6.2.1.4 Other Windows 93
- ❐Yellow indicates an event 95
- 6.2.1.5 Configuration Options 97
- 6.2.2 Survey Parameters 97
- 6.2.2.1 Altimeter 99
- 6.2.2.2 External Data Logging 101
- 6.2.2.3 Load Factory Defaults 102
- 6.2.2.4 Video Overlay Setup 102
- 350 Cable Survey System 105
- 6.3 AFTER THE DIVE 107
- 6.4 REPLAYING A LOG FILE 108
- 6.5 QUALITY CONTROL 110
- 7 OPERATING PROCEDURE 112
- 7.1 BEFORE THE SURVEY 113
- 7.1.2 Tone Frequency 114
- 7.1.3 Survey Requirements 114
- 7.2 DURING THE SURVEY 115
- 7.2.2 Data Logging 117
- 7.2.3 Replay Logged Data 118
- 7.3 DATA FORMATS 119
- 7.3.1 External Logging Format 119
- 7.3.1.2 Forward Search mode 121
- ❐The target is out of range 122
- 7.3.2 Internal Logging Format 123
- 7.3.3 Altimeter Data Format 125
- 7.3.3.3 Simrad UK90 127
- 7.4 AFTER THE SURVEY 130
- 7.5.1 Operating Performance 131
- 7.5.2 Sources of Error 132
- 7.5.2.1 ROV Handling 132
- Figure 7–3: ROV roll errors 134
- Figure 7–4: Sloping target 136
- ❐ Changes of ROV heading 137
- ❐ Acoustic noise 137
- Figure 7–5: Curved target 139
- 7.6 ROVS 140
- 7.6.1 Speed of Operation 140
- 7.6.3 Tracked ROV 140
- 8 SYSTEM SPECIFICATIONS 142
- 8.1 SPECIFICATIONS 143
- 8 – System Specifications 144
- 8.1.2 Sub-sea Electronics Pod 145
- 8.1.3 Search Coil Array 145
- 8.2 PERFORMANCE 146
- 8.3 SYSTEM TRIALS 147
- 8.3.2 Results 149
- 8.3.2.1 Accuracy 149
- 8.4 UPDATE RATE 150
- 9 MAINTENANCE 152
- 9.1 CIRCUIT DESCRIPTION 153
- 9.1.1 Sensing Coils 154
- 9.1.2 Sub-sea Electronics Pod 155
- 9.1.2.2 Processor Board 156
- 9.1.2.3 Power Supply 158
- 9.1.3 Current Loop 158
- Page 8 of 26 159
- 9.2.2 Sub-sea Electronics Pod 160
- ❐ A 2.5mm hexagonal key 161
- Processor Board 162
- ADC Board 163
- 9.2.3 Coil Cable Continuity 166
- 9.3 FAULT IDENTIFICATION 167
- 9 – Maintenance 168
- 9.3.2 Communications Failure 169
- Page 20 of 26 171
- 9.3.4 Altimeter Failure 173
- Page 24 of 26 175
- Page 26 of 26 177
- 10 SYSTEM DRAWINGS 178
- 10 – System Drawings 180
- A OPERATING THEORY 192
- A.1 ELECTROMAGNETIC FIELDS 193
- A.2 FIELD DETECTION 193
- A.3 SIGNAL ISOLATION 194
- A.4 CALCULATION 195
- A.4.1 Survey Mode 196
- A.4.2 Forward Search Mode 198
- A.4.3 Skew Measurement 199
- B OPTIONS 202
- B.1 DUALTRACK SYSTEM 203
- B.1.1 The Equipment 203
- B.1.2 The Differences 204
- B.1.3 Scope of Delivery 205
- B.1.4 Physical Installation 207
- B.1.4.1 Search-coils 207
- B.1.4.2 Sub-sea Pods 207
- B.1.5 Electrical Connection 208
- B.1.5.1 System Configuration 210
- B.1.5.2 System Operation 211
- B.2 TRAINING 212
- C CABLES AND TONES 214
- C.1 TONE INJECTION 215
- C.1.1 Frequency Selection 215
- C.1.2 Connection to the cable 215
- C.1.2.1 Short cables 215
- C.1.2.2 Long cables 216
- C.1.2.3 Fibre-optic Cables 216
- C.1.3 Seawater Return Path 217
- D ALTIMETER 218
- D.2 INSTALLATION 219
- D.2.1 Electrical Connection 219
- D.2.2 Serial Output 219
- D.2.3 Mounting 220
- D.2.4 Maintenance 221
- D.2.5 Test in Air 221
- D.2.6 Internal Settings 221
- D.3 THEORY OF OPERATION 222
- D.3.1 Operating Principles 222
- D.3.1.1 Speed of Sound 223
- D.3.1.2 Terminology 223
- D.3.1.3 Propagation Loss 224
- D.3.1.4 Limitations 224
- D.3.2 Technical Description 225
- D.3.2.1 Power Supply 225
- D.3.2.2 Transmitter 226
- D.3.2.3 Receiver 226
- D.3.2.4 Sensor Circuitry 227
- D.3.2.5 Digital Circuitry 227
- D.3.2.6 Averaging Algorithm 228
- D.3.2.7 Optional Modem 228
- D.4 PART NUMBERS 228
- D.5 DRAWINGS 229
- D – ALTIMETER 230
- E COIL TESTER 236
- E.1 PRE-OPERATION 238
- E.2 OPERATION 240
- E.2.1 Frequency Selection 242
- E.3 FAULT IDENTIFICATION 243
- E.4 BATTERY REPLACEMENT 243
- E.5 MAINTENANCE 244
- E.6 SPECIFICATION 244
- F REFERENCE 246
- F.1 SURVEY DETAILS 248
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